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Hi ! I am . . .

Meticulous & a cat person

My name is Soham Mondal

I love anything in technology.Being a hardware engineer @ Samsung Electronics I facilitate the production of high performance hardware by aiding in their design and verification.

I take the best out of any creation and try to incorporate the same values and culture to my products. I have knowledge in designing state machine based mini-contoller IPs. I have great knack for computer architecture and high performance, high bandwidth unified memory architectures.

Current Interests - Application specific controller design, Accelerator design, Coherent Unified memory systems, Metric driven SoC verification with unit firmware, Design and Verification automation, UVM-compliant VIP development, Edge devices.

I had also occassionally built websites in html,js,css like the one you are currently seeing. It is a somewhat old theme. Hope you enjoy!

 I  

Some other links to nice things

RESUME    [ pdf ]

Gallery    [ blog ]

My Skills

Verilog & System Verilog

Universal Verification Methodology

Python

C/C++

Make

Shell scripting

TCL

Latex

Java

Git | Bitbucket | Cvs

HTML5 & CSS3

Javascript

Work Experience

{

Senior SoC Design Verification Engineer Samsung Semiconductor India R&D , (2019 - )

  • Team (Storage SoC DV) - Design and metric driven verification of Controller Host SoC comprising Host subsystem + Flash controller + NAND with unit firmware based on ARM R & M series processor
  • Knowledge on protocols like On-Chip (NOC/NIC) AXI3, AXI4, AHB Lite | Host UFS 3.1, UFS 4.0, NVMe | Unipro, PCIe, MPHY | Peripherals I2C, SPI, UART, SMBUS
  • Played significant role in verification of Mobile UFS SoC | testplan + implementation | integration + development
  • Expertise in End to End coverage driven verification of AMBA slaves of NOC/NIC for connectivity checks | scoreboard creation | monitor development | report generation
  • Strong knowledge of Cadence VIP and integration
  • Developed Python and shell based tool for automated error-free verification and testbench creation for NOC/NIC slave verification for Enterprise NVME1.4 SSD with largest number of slaves. Reduced the Time-to-First-Test by almost 100% | Won prize in Samsung Global OSVC conference for whitepaper presentation
  • Knowledge in Makefile, Shell Scripting, TCL and Python Automation
  • Development of Comprehensive testplan and UVM compliant VIP development
  • Micro-architecture and State Machine Based custom controller RTL design
  • Constraint Random Stimulus, Coverage, SV-assertions, Formality tool, equivalence check
  • Knowledge of pipelining of design, Static Timing Analysis

{

Hardware Intern Samsung Semiconductor India R&D , (2018)

  • Team (DRAM h/w) - Understand MBIST, MBISR architectures applicable for DDR4/5 and share knowledge sessions to improve proprietary MBIST architecture with new features
  • Creation of driver/adapter IP to facilitate forward compatibility of DDR3 MBIST to DDR4/5 command sets and functionally verify the same with directed verilog testbench
  • Port & validate the setup in xilinx virtex ultrascale vcu-108 board for proof-of-concept
  • Received Pre-placement offer on basis of work Offer

My Portfolio

  • Jsfoo 2015

    RedBull Marketing PresentationPresentation

  • Convolution JU EE
    Event Presentation
    (1st runners up)
    (This is a doc. Right click & open it in new tab)Presentation

  • Marketing Plan for a game app
    (This is a doc. Right click & open it in new tab)Presentation

  • Developing a text search engine using Java & XML
    (This is a doc. Right click & open it in new tab)Presentation

  • About Me
    (This is a image. Right click & open it in new tab)Graphic Design

 

Blogs

Visit my open source projects

Visit old blog (no longer maintained)

 

Contact

Drop a line

Contact Info

Phone : +91-8335805583

Social : sohammondal39@gmail

Home : Dhakuria, Kolkata, India

College : Jadavpur University


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